1. Field of the Invention
The present invention generally relates to a graded anti-reflective coating, its use in integrated circuit fabrication, and a method for depositing the graded anti-reflective coating.
2. Description of the Related Art
In recent years integrated circuits have evolved into complex devices that commonly include millions of transistors, capacitors, resistors, and other electronic components on a single chip. Therefore, there is an inherent demand for increased circuit densities, as well as a continual demand for faster and more efficient circuit components. The combined demands for faster circuits having greater circuit densities imposes corresponding demands on the materials used to fabricate such integrated circuits. This demand for faster circuits with greater circuit densities has led to the use of low resistivity conductive materials, such as copper and/or low dielectric constant insulating materials having a dielectric constant less than about 3.8.
The demands for faster components having greater circuit densities also imposes demands on process sequences used for integrated circuit manufacture. For example, in process sequences using conventional lithographic techniques, a layer of energy sensitive resist is generally formed over a stack of material layers on a substrate. An image of a pattern may then be introduced into the energy sensitive resist layer. Thereafter, the pattern introduced into the energy sensitive resist layer may be transferred into one or more layers of the material stack formed on the substrate using the layer of energy sensitive resist as a mask. The pattern introduced into the energy sensitive resist may then be transferred into a material layer(s) using a chemical and/or physical etchant. A chemical etchant is generally designed to have a greater etch selectivity for the material layer(s) than for the energy sensitive resist, which generally indicates that the chemical etchant will etch the material layer(s) at a faster rate than it etches the energy sensitive resist. The faster etch rate for the one or more material layers of the stack typically prevents the energy sensitive resist material from being consumed prior to completion of the pattern transfer.
Lithographic imaging tools used in the manufacture of integrated circuits employ deep ultraviolet (DUV) imaging wavelengths, i.e., wavelengths of 248 nm or 193 nm, to generate resist patterns. The DUV imaging wavelengths are generally known to improve resist pattern resolution as a result of the diffraction effects being reduced at the shorter wavelengths. However, the increased reflective nature of many underlying materials, i.e., polysilicon and metal silicides, for example, may operate to degrade the resulting resist patterns at DUV wavelengths. Furthermore, for printing features with smaller pitches (≦250-300 nm) immersion lithography using lenses with a high numerical aperture is typically used. As the numerical aperture (NA) increases beyond 0.9, and pitch sizes decrease to less than 100 nm, light reflectance from non-normal incidence angles becomes a significant source of reflection.
One technique proposed to minimize reflections from an underlying material layer uses an anti-reflective coating (ARC). The ARC is formed over the reflective material layer prior to resist patterning. The ARC generally suppresses the reflections off the underlying material layer during resist imaging, thereby providing more accurate pattern replication in the layer of energy sensitive resist. However, currently available anti-reflective coating techniques fail to account for the light reflectance from non-normal incidence angles.
In view of conventional photolithographic techniques, there exists a need in the art for an anti-reflective coating that reduces light reflectance from non-normal incidence angles.